Architectural Requirements for In-Pipeline CCMs

The encorporation of a custom computing machine (CCM) into the pipeline of a su-perscalar processor has been shown to allow signiicant gains in performance for general-purpose codes 1,2,3]. This paper describes the architectural features necessary for such an in-pipeline CCM to achieve maximum potential performance gains when all mapping is done automatically by the compiler. We nd that a CCM with two inputs and two outputs that computes a result in one cycle captures the performance beneets of the maximal architecture. We also nd that the ability to use four unique conngurations within a small number of cycles can be very beneecial.